3.2.1 Logic Gates and Truth Tables
A logic gate receives one or two binary inputs and produces one binary output. The gate's symbol identifies the operation, while its truth table records the output for every possible input combination.
This opening logic section concentrates on the six required gates: NOT, AND, OR, NAND, NOR, and XOR (EOR). Translating full problem statements into circuits is developed in the next section.
By the end of this section, you should be able to:
- Interpret 0 and 1 as the two states used by a digital logic system.
- Recognise and draw the standard symbols for NOT, AND, OR, NAND, NOR, and XOR gates.
- State the function of each gate accurately.
- Remember that NOT has one input while the other gates on this course use two inputs.
- Construct the truth table for each individual gate.
- Use relationships between gates to check an answer.
- Distinguish inclusive OR from exclusive OR.
From physical states to binary values
Digital circuits work with two distinguishable states. Depending on the circuit, these might correspond to a lower and higher voltage, an inactive and active signal, or an off and on condition. We represent the two states using 0 and 1.
| Binary value | Possible interpretation | Important note |
|---|---|---|
| 0 | FALSE, inactive, lower signal state | Its precise physical meaning depends on the circuit design. |
| 1 | TRUE, active, higher signal state | It represents a logic state, not necessarily the number one as a quantity. |
A one-input gate has 2 possible input rows. A two-input gate has 4 rows because the combinations are 00, 01, 10, and 11.
Exam tip
Write two-input combinations in binary-counting order: 00, 01, 10, 11. This prevents missing or repeating a row.
Recognising the six gate symbols
Inputs are shown on the left and the output is shown on the right. A small circle on an output means that the result is inverted. XOR resembles OR but has an additional curved line on the input side.
Common mistake
Do not use the small inversion circle as decoration. It changes the output: AND becomes NAND, and OR becomes NOR.
NOT: reverse one input
NOT is the only single-input gate in this section. It produces the opposite logic value. An input of 0 becomes 1, and an input of 1 becomes 0.
| Input A | Output X = NOT A |
|---|---|
| 0 | 1 |
| 1 | 0 |
Useful memory check: the NOT column must always contain the opposite value from the input column.
AND and OR: two different ways to combine inputs
AND gate
AND produces 1 only when both inputs are 1. A single 0 is enough to make the output 0.
| A | B | X = A AND B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
OR gate
OR produces 1 when at least one input is 1. This includes the case where both inputs are 1.
| A | B | X = A OR B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
Common mistake
OR is normally inclusive. For inputs 1 and 1, an OR gate still outputs 1. “One but not both” describes XOR instead.
NAND and NOR: complemented outputs
NAND and NOR are easiest to understand by starting with another gate and then inverting its result.
NAND gate
NAND is NOT-AND. Its output is the opposite of AND, so it produces 0 only when both inputs are 1.
| A | B | A AND B | X = A NAND B |
|---|---|---|---|
| 0 | 0 | 0 | 1 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 0 |
NOR gate
NOR is NOT-OR. Its output is the opposite of OR, so it produces 1 only when both inputs are 0.
| A | B | A OR B | X = A NOR B |
|---|---|---|---|
| 0 | 0 | 0 | 1 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 |
Exam tip
To check NAND or NOR, first complete the AND or OR output and then reverse every value. This is more reliable than guessing from the gate name.
XOR: detect different inputs
XOR, also called EOR, produces 1 when the two inputs are different. It produces 0 when the inputs match.
| A | B | X = A XOR B | Reason |
|---|---|---|---|
| 0 | 0 | 0 | The inputs match. |
| 0 | 1 | 1 | The inputs differ. |
| 1 | 0 | 1 | The inputs differ. |
| 1 | 1 | 0 | The inputs match. |
A useful visual pattern is 0, 1, 1, 0: the middle two rows produce 1.
Common mistake
XOR does not mean “at least one”. The 1,1 row must produce 0 because both inputs are active.
Combined truth-table reference
This table places the two-input gates side by side so that their relationships are visible.
| A | B | AND | OR | NAND | NOR | XOR |
|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 |
| Relationship | How to use it as a check |
|---|---|
| NAND is the complement of AND | Every NAND value must be the opposite of the AND value in the same row. |
| NOR is the complement of OR | Every NOR value must be the opposite of the OR value in the same row. |
| XOR compares the inputs | Matching inputs give 0; different inputs give 1. |
| AND is strict | Only the 11 row gives 1. |
| OR is inclusive | Every row except 00 gives 1. |
Constructing a gate truth table from its definition
Memorising the six patterns is useful, but understanding the construction method is more dependable.
- Write the input headings and the output heading.
- List every input combination in binary order.
- Apply the gate's rule to one row at a time.
- Check any complementary relationship.
Original worked example: construct NOR
NOR means the output is the inverse of OR.
| A | B | Step 1: A OR B | Step 2: NOT (A OR B) |
|---|---|---|---|
| 0 | 0 | 0 | 1 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 |
The final NOR pattern is therefore 1, 0, 0, 0.
Exam tip
When the gate is NAND or NOR, using a temporary AND or OR column gives you a clear checking method. You may remove the workspace column after completing the table.
Interactive bridge: propositions before circuits
This existing checker is retained as a bridge to the next topic. It lets you change TRUE/FALSE conditions and observe an outcome. In 3.2.2, those conditions will be translated into gate-based circuits.
Exam support
Define by output condition
State exactly when the output is 1. For example: “XOR outputs 1 when the two inputs are different.”
Use the symbol carefully
Check for an inversion circle and, for XOR, the additional curved line. These small details change the gate.
Use all rows
NOT requires two rows. Every other gate in this AS section uses two inputs and therefore requires four rows.
Common mistakes and misconceptions
- Giving a NOT gate two inputs.
- Using XOR behaviour for an OR gate.
- Forgetting that NAND and NOR reverse another gate's output.
- Writing TRUE/FALSE in some rows and 0/1 in others without a clear convention.
- Listing input rows in an inconsistent order and accidentally omitting a combination.
- Drawing an OR symbol without noticing whether the extra XOR curve is present.
Practice
Gate functions
- Which gate produces the opposite of its single input?
- Which two-input gate produces 1 only for the 11 combination?
- Which gate produces 1 when the inputs differ?
- Explain the difference between OR and XOR for inputs A = 1 and B = 1.
- Explain why NAND can be described as a complemented AND gate.
Construct the tables
- Draw the complete truth table for a NOT gate.
- Draw the complete truth table for an OR gate.
- Construct a NAND truth table by first creating an AND workspace column.
- Construct a NOR truth table by first creating an OR workspace column.
- Write the XOR output pattern for rows 00, 01, 10, and 11.
Original diagnostic task
A student has written the following output column for an XOR gate: 0, 1, 1, 1.
- Identify the incorrect row.
- Explain why it is incorrect.
- State which gate actually has the pattern 0, 1, 1, 1.
Self-check: reveal the diagnostic answer
The final row is incorrect. XOR outputs 0 for inputs 1 and 1 because the inputs match. The pattern 0, 1, 1, 1 belongs to OR.
Review
| Gate | Number of inputs | When the output is 1 | Output pattern |
|---|---|---|---|
| NOT | 1 | When the input is 0 | 1, 0 |
| AND | 2 | Only when both inputs are 1 | 0, 0, 0, 1 |
| OR | 2 | When at least one input is 1 | 0, 1, 1, 1 |
| NAND | 2 | Except when both inputs are 1 | 1, 1, 1, 0 |
| NOR | 2 | Only when both inputs are 0 | 1, 0, 0, 0 |
| XOR / EOR | 2 | When the inputs are different | 0, 1, 1, 0 |